This is the documentation for the latest (main) development branch of Zephyr. If you are looking for the documentation of previous releases, use the drop-down menu on the left and select the desired version.

ST Nucleo U575ZI Q

Overview

The Nucleo U575ZI Q board, featuring an ARM Cortex-M33 based STM32U575ZI MCU, provides an affordable and flexible way for users to try out new concepts and build prototypes by choosing from the various combinations of performance and power consumption features. Here are some highlights of the Nucleo U575ZI Q board:

  • STM32U575ZI microcontroller in LQFP144 package

  • Internal SMPS to generate V core logic supply

  • Two types of extension resources:

    • Arduino Uno V3 connectivity

    • ST morpho extension pin headers for full access to all STM32 I/Os

  • On-board ST-LINK/V3E debugger/programmer

  • Flexible board power supply:

    • USB VBUS or external source(3.3V, 5V, 7 - 12V)

    • ST-Link V3E

  • Three users LEDs

  • Two push-buttons: USER and RESET

  • USB Type-C™ Sink device FS

Hardware

The STM32U575xx devices are an ultra-low-power microcontrollers family (STM32U5 Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core. They operate at a frequency of up to 160 MHz.

  • Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode)

  • Core: ARM® 32-bit Cortex® -M33 CPU with TrustZone® and FPU.

  • Performance benchmark:

    • 1.5 DMPIS/MHz (Drystone 2.1)

    • 651 CoreMark® (4.07 CoreMark® /MHZ)

  • Security

    • Arm® TrustZone® and securable I/Os memories and peripherals

    • Flexible life cycle scheme with RDP (readout protection) and password protected debug

    • Root of trust thanks to unique boot entry and secure hide protection area (HDP)

    • Secure Firmware Installation thanks to embedded Root Secure Services

    • Secure Firmware Update support with TF-M

    • HASH hardware accelerator

    • Active tampers

    • True Random Number Generator NIST SP800-90B compliant

    • 96-bit unique ID

    • 512-byte One-Time Programmable for user data

  • Clock management:

    • 4 to 50 MHz crystal oscillator

    • 32 kHz crystal oscillator for RTC (LSE)

    • Internal 16 MHz factory-trimmed RC ( ±1%)

    • Internal low-power 32 kHz RC ( ±5%)

    • 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by LSE (better than ±0.25 % accuracy)

    • 3 PLLs for system clock, USB, audio, ADC

    • Internal 48 MHz with clock recovery

  • Power management

    • Embedded regulator (LDO)

    • Embedded SMPS step-down converter supporting switch on-the-fly and voltage scaling

  • RTC with HW calendar and calibration

  • Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V

  • Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors

  • Up to 17 timers and 2 watchdogs

    • 2x 16-bit advanced motor-control

    • 2x 32-bit and 5 x 16-bit general purpose

    • 4x low-power 16-bit timers (available in Stop mode)

    • 2x watchdogs

    • 2x SysTick timer

  • ART accelerator

    • 8-Kbyte instruction cache allowing 0-wait-state execution from Flash and external memories: up to 160 MHz, MPU, 240 DMIPS and DSP

    • 4-Kbyte data cache for external memories

  • Memories

    • 2-Mbyte Flash memory with ECC, 2 banks read-while-write, including 512 Kbytes with 100 kcycles

    • 786-Kbyte SRAM with ECC OFF or 722-Kbyte SRAM including up to 322-Kbyte SRAM with ECC ON

    • External memory interface supporting SRAM, PSRAM, NOR, NAND and FRAM memories

    • 2 Octo-SPI memory interfaces

  • Rich analog peripherals (independent supply)

    • 14-bit ADC 2.5-Msps, resolution up to 16 bits with hardware oversampling

    • 12-bit ADC 2.5-Msps, with hardware oversampling, autonomous in Stop 2 mode

    • 2 12-bit DAC, low-power sample and hold

    • 2 operational amplifiers with built-in PGA

    • 2 ultra-low-power comparators

  • Up to 22 communication interfaces

    • USB Type-C / USB power delivery controller

    • USB OTG 2.0 full-speed controller

    • 2x SAIs (serial audio interface)

    • 4x I2C FM+(1 Mbit/s), SMBus/PMBus

    • 6x USARTs (ISO 7816, LIN, IrDA, modem)

    • 3x SPIs (5x SPIs with dual OCTOSPI in SPI mode)

    • 1x FDCAN

    • 2x SDMMC interface

    • 16- and 4-channel DMA controllers, functional in Stop mode

    • 1 multi-function digital filter (6 filters)+ 1 audio digital filter with sound-activity detection

  • CRC calculation unit

  • Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™

  • Graphic features

    • Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation

    • 1 digital camera interface

  • Mathematical co-processor

  • CORDIC for trigonometric functions acceleration

  • FMAC (filter mathematical accelerator)

More information about STM32U575ZI can be found here:

Supported Features

The Zephyr nucleo_u575zi_q board configuration supports the following hardware features:

Interface

Controller

Driver/Component

NVIC

on-chip

nested vector interrupt controller

UART

on-chip

serial port-polling; serial port-interrupt

PINMUX

on-chip

pinmux

GPIO

on-chip

gpio

Other hardware features are not yet supported on this Zephyr port.

The default configuration can be found in the defconfig file: boards/arm/nucleo_u575zi_q/nucleo_u575zi_q_defconfig

Connections and IOs

Nucleo U575ZI Q Board has 9 GPIO controllers. These controllers are responsible for pin muxing, input/output, pull-up, etc.

For mode details please refer to STM32 Nucleo-144 board User Manual.

Default Zephyr Peripheral Mapping:

  • UART_1_TX : PA9

  • UART_1_RX : PA10

  • USER_PB : PC13

  • LD1 : PC7

  • LD2 : PB7

  • LD3 : PG2

System Clock

Nucleo U575ZI Q System Clock could be driven by internal or external oscillator, as well as main PLL clock. By default System clock is driven by PLL clock at 160MHz, driven by 4MHz medium speed internal oscillator.

Serial Port

Nucleo U575ZI Q board has 6 U(S)ARTs. The Zephyr console output is assigned to USART1. Default settings are 115200 8N1.

Programming

Applications for the nucleo_u575zi_q board configuration can be built and flashed in the usual way (see Building an Application and Run an Application for more details).

Flashing

Board is configured to be flashed using west STM32CubeProgrammer runner. Installation of STM32CubeProgrammer is then required to flash the board.

Flashing an application to Nucleo U575ZI Q

Connect the Nucleo U575ZI Q to your host computer using the USB port. Then build and flash an application. Here is an example for the Hello World application.

Run a serial host program to connect with your Nucleo board:

$ minicom -D /dev/ttyACM0

Then build and flash the application.

# From the root of the zephyr repository
west build -b nucleo_u575zi_q samples/hello_world
west flash

You should see the following message on the console:

Hello World! arm

Debugging

STM32U5 support is not currently supported in openocd. As a temporary workaround, user can use STMicroelectronics customized version of OpenOCD to debug the the Nucleo U575ZI Q. For this you need to fetch this repo and build openocd following the instructions provided in the README of the project. Then, build zephyr project indicating the openocd location in west build command.

Here is an example for the Blinky application.

# From the root of the zephyr repository
west build -b nucleo_u575zi_q samples/basic/blinky -- -DOPENOCD="<path_to_openocd>/openocd/src/openocd" -DOPENOCD_DEFAULT_PATH="<path_to_openocd>/openocd/tcl/"

Then, indicate openocd as the chosen runner in flash and debug commands:

# From the root of the zephyr repository
west build -b nucleo_u575zi_q samples/basic/blinky -- -r openocd
west flash

# From the root of the zephyr repository
west build -b nucleo_u575zi_q samples/basic/blinky -- -r openocd
west debug