Zephyr API Documentation
2.7.0-rc2
A Scalable Open Source RTOS
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ARM AArch32 public interrupt handling. More...
Go to the source code of this file.
Macros | |
#define | DO_TOSTR(s) #s |
#define | TOSTR(s) DO_TOSTR(s) |
#define | DO_CONCAT(x, y) x ## y |
#define | CONCAT(x, y) DO_CONCAT(x, y) |
#define | IRQ_ZERO_LATENCY BIT(0) |
#define | ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) |
#define | ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) |
#define | ARCH_ISR_DIRECT_PM() do { } while (false) |
#define | ARCH_ISR_DIRECT_HEADER() arch_isr_direct_header() |
#define | ARCH_ISR_DIRECT_FOOTER(swap) arch_isr_direct_footer(swap) |
#define | ARCH_ISR_DIRECT_DECLARE(name) |
Functions | |
void | arch_irq_enable (unsigned int irq) |
void | arch_irq_disable (unsigned int irq) |
int | arch_irq_is_enabled (unsigned int irq) |
static void | arch_isr_direct_header (void) |
static void | arch_isr_direct_footer (int maybe_swap) |
ARM AArch32 public interrupt handling.
ARM AArch32-specific kernel interrupt handling interface. Included by arm/arch.h.
#define ARCH_IRQ_CONNECT | ( | irq_p, | |
priority_p, | |||
isr_p, | |||
isr_param_p, | |||
flags_p | |||
) |
#define ARCH_IRQ_DIRECT_CONNECT | ( | irq_p, | |
priority_p, | |||
isr_p, | |||
flags_p | |||
) |
#define ARCH_ISR_DIRECT_DECLARE | ( | name | ) |
#define ARCH_ISR_DIRECT_FOOTER | ( | swap | ) | arch_isr_direct_footer(swap) |
#define ARCH_ISR_DIRECT_HEADER | ( | ) | arch_isr_direct_header() |
#define ARCH_ISR_DIRECT_PM | ( | ) | do { } while (false) |
#define CONCAT | ( | x, | |
y | |||
) | DO_CONCAT(x, y) |
#define DO_CONCAT | ( | x, | |
y | |||
) | x ## y |
#define IRQ_ZERO_LATENCY BIT(0) |
Set this interrupt up as a zero-latency IRQ. It has a fixed hardware priority level (discarding what was supplied in the interrupt's priority argument), and will run even if irq_lock() is active. Be careful!
int arch_irq_is_enabled | ( | unsigned int | irq | ) |
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inlinestatic |