Zephyr API Documentation  2.7.0-rc2
A Scalable Open Source RTOS
stm32_clock_control.h File Reference

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Data Structures

struct  stm32_pclken
 

Macros

#define STM32_CLOCK_CONTROL_NODE   DT_NODELABEL(rcc)
 
#define STM32_AHB_PRESCALER   CONFIG_CLOCK_STM32_AHB_PRESCALER
 
#define STM32_APB1_PRESCALER   CONFIG_CLOCK_STM32_APB1_PRESCALER
 
#define STM32_APB2_PRESCALER   CONFIG_CLOCK_STM32_APB2_PRESCALER
 
#define STM32_AHB3_PRESCALER   CONFIG_CLOCK_STM32_AHB3_PRESCALER
 
#define STM32_AHB4_PRESCALER   CONFIG_CLOCK_STM32_AHB4_PRESCALER
 
#define STM32_CPU1_PRESCALER   CONFIG_CLOCK_STM32_CPU1_PRESCALER
 
#define STM32_CPU2_PRESCALER   CONFIG_CLOCK_STM32_CPU2_PRESCALER
 
#define STM32_D1CPRE   CONFIG_CLOCK_STM32_D1CPRE
 
#define STM32_HPRE   CONFIG_CLOCK_STM32_HPRE
 
#define STM32_D2PPRE1   CONFIG_CLOCK_STM32_D2PPRE1
 
#define STM32_D2PPRE2   CONFIG_CLOCK_STM32_D2PPRE2
 
#define STM32_D1PPRE   CONFIG_CLOCK_STM32_D1PPRE
 
#define STM32_D3PPRE   CONFIG_CLOCK_STM32_D3PPRE
 
#define STM32_PLL_M_DIVISOR   CONFIG_CLOCK_STM32_PLL_M_DIVISOR
 
#define STM32_PLL_N_MULTIPLIER   CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER
 
#define STM32_PLL_P_DIVISOR   CONFIG_CLOCK_STM32_PLL_P_DIVISOR
 
#define STM32_PLL_Q_DIVISOR   CONFIG_CLOCK_STM32_PLL_Q_DIVISOR
 
#define STM32_PLL_R_DIVISOR   CONFIG_CLOCK_STM32_PLL_R_DIVISOR
 
#define STM32_PLL3_ENABLE   CONFIG_CLOCK_STM32_PLL3_ENABLE
 
#define STM32_PLL3_M_DIVISOR   CONFIG_CLOCK_STM32_PLL3_M_DIVISOR
 
#define STM32_PLL3_N_MULTIPLIER   CONFIG_CLOCK_STM32_PLL3_N_MULTIPLIER
 
#define STM32_PLL3_P_ENABLE   CONFIG_CLOCK_STM32_PLL3_P_ENABLE
 
#define STM32_PLL3_P_DIVISOR   CONFIG_CLOCK_STM32_PLL3_P_DIVISOR
 
#define STM32_PLL3_Q_ENABLE   CONFIG_CLOCK_STM32_PLL3_Q_ENABLE
 
#define STM32_PLL3_Q_DIVISOR   CONFIG_CLOCK_STM32_PLL3_Q_DIVISOR
 
#define STM32_PLL3_R_ENABLE   CONFIG_CLOCK_STM32_PLL3_R_ENABLE
 
#define STM32_PLL3_R_DIVISOR   CONFIG_CLOCK_STM32_PLL3_R_DIVISOR
 
#define STM32_PLL_XTPRE   CONFIG_CLOCK_STM32_PLL_XTPRE
 
#define STM32_PLL_MULTIPLIER   CONFIG_CLOCK_STM32_PLL_MULTIPLIER
 
#define STM32_PLL_PREDIV1   CONFIG_CLOCK_STM32_PLL_PREDIV1
 
#define STM32_PLL_PREDIV   CONFIG_CLOCK_STM32_PLL_PREDIV
 
#define STM32_PLL_DIVISOR   CONFIG_CLOCK_STM32_PLL_DIVISOR
 
#define STM32_SYSCLK_SRC_PLL   CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL
 
#define STM32_SYSCLK_SRC_HSI   CONFIG_CLOCK_STM32_SYSCLK_SRC_HSI
 
#define STM32_SYSCLK_SRC_HSE   CONFIG_CLOCK_STM32_SYSCLK_SRC_HSE
 
#define STM32_SYSCLK_SRC_MSI   CONFIG_CLOCK_STM32_SYSCLK_SRC_MSI
 
#define STM32_SYSCLK_SRC_CSI   CONFIG_CLOCK_STM32_SYSCLK_SRC_CSI
 
#define STM32_PLL_SRC_MSI   CONFIG_CLOCK_STM32_PLL_SRC_MSI
 
#define STM32_PLL_SRC_HSI   CONFIG_CLOCK_STM32_PLL_SRC_HSI
 
#define STM32_PLL_SRC_HSE   CONFIG_CLOCK_STM32_PLL_SRC_HSE
 
#define STM32_PLL_SRC_PLL2   CONFIG_CLOCK_STM32_PLL_SRC_PLL2
 
#define STM32_LSE_CLOCK   CONFIG_CLOCK_STM32_LSE
 
#define STM32_MSI_RANGE   CONFIG_CLOCK_STM32_MSI_RANGE
 
#define STM32_MSI_PLL_MODE   CONFIG_CLOCK_STM32_MSI_PLL_MODE
 
#define STM32_HSI_DIVISOR   CONFIG_CLOCK_STM32_HSI_DIVISOR
 
#define STM32_HSE_BYPASS   CONFIG_CLOCK_STM32_HSE_BYPASS
 

Macro Definition Documentation

◆ STM32_AHB3_PRESCALER

#define STM32_AHB3_PRESCALER   CONFIG_CLOCK_STM32_AHB3_PRESCALER

◆ STM32_AHB4_PRESCALER

#define STM32_AHB4_PRESCALER   CONFIG_CLOCK_STM32_AHB4_PRESCALER

◆ STM32_AHB_PRESCALER

#define STM32_AHB_PRESCALER   CONFIG_CLOCK_STM32_AHB_PRESCALER

◆ STM32_APB1_PRESCALER

#define STM32_APB1_PRESCALER   CONFIG_CLOCK_STM32_APB1_PRESCALER

◆ STM32_APB2_PRESCALER

#define STM32_APB2_PRESCALER   CONFIG_CLOCK_STM32_APB2_PRESCALER

◆ STM32_CLOCK_CONTROL_NODE

#define STM32_CLOCK_CONTROL_NODE   DT_NODELABEL(rcc)

◆ STM32_CPU1_PRESCALER

#define STM32_CPU1_PRESCALER   CONFIG_CLOCK_STM32_CPU1_PRESCALER

◆ STM32_CPU2_PRESCALER

#define STM32_CPU2_PRESCALER   CONFIG_CLOCK_STM32_CPU2_PRESCALER

◆ STM32_D1CPRE

#define STM32_D1CPRE   CONFIG_CLOCK_STM32_D1CPRE

◆ STM32_D1PPRE

#define STM32_D1PPRE   CONFIG_CLOCK_STM32_D1PPRE

◆ STM32_D2PPRE1

#define STM32_D2PPRE1   CONFIG_CLOCK_STM32_D2PPRE1

◆ STM32_D2PPRE2

#define STM32_D2PPRE2   CONFIG_CLOCK_STM32_D2PPRE2

◆ STM32_D3PPRE

#define STM32_D3PPRE   CONFIG_CLOCK_STM32_D3PPRE

◆ STM32_HPRE

#define STM32_HPRE   CONFIG_CLOCK_STM32_HPRE

◆ STM32_HSE_BYPASS

#define STM32_HSE_BYPASS   CONFIG_CLOCK_STM32_HSE_BYPASS

◆ STM32_HSI_DIVISOR

#define STM32_HSI_DIVISOR   CONFIG_CLOCK_STM32_HSI_DIVISOR

◆ STM32_LSE_CLOCK

#define STM32_LSE_CLOCK   CONFIG_CLOCK_STM32_LSE

◆ STM32_MSI_PLL_MODE

#define STM32_MSI_PLL_MODE   CONFIG_CLOCK_STM32_MSI_PLL_MODE

◆ STM32_MSI_RANGE

#define STM32_MSI_RANGE   CONFIG_CLOCK_STM32_MSI_RANGE

◆ STM32_PLL3_ENABLE

#define STM32_PLL3_ENABLE   CONFIG_CLOCK_STM32_PLL3_ENABLE

◆ STM32_PLL3_M_DIVISOR

#define STM32_PLL3_M_DIVISOR   CONFIG_CLOCK_STM32_PLL3_M_DIVISOR

◆ STM32_PLL3_N_MULTIPLIER

#define STM32_PLL3_N_MULTIPLIER   CONFIG_CLOCK_STM32_PLL3_N_MULTIPLIER

◆ STM32_PLL3_P_DIVISOR

#define STM32_PLL3_P_DIVISOR   CONFIG_CLOCK_STM32_PLL3_P_DIVISOR

◆ STM32_PLL3_P_ENABLE

#define STM32_PLL3_P_ENABLE   CONFIG_CLOCK_STM32_PLL3_P_ENABLE

◆ STM32_PLL3_Q_DIVISOR

#define STM32_PLL3_Q_DIVISOR   CONFIG_CLOCK_STM32_PLL3_Q_DIVISOR

◆ STM32_PLL3_Q_ENABLE

#define STM32_PLL3_Q_ENABLE   CONFIG_CLOCK_STM32_PLL3_Q_ENABLE

◆ STM32_PLL3_R_DIVISOR

#define STM32_PLL3_R_DIVISOR   CONFIG_CLOCK_STM32_PLL3_R_DIVISOR

◆ STM32_PLL3_R_ENABLE

#define STM32_PLL3_R_ENABLE   CONFIG_CLOCK_STM32_PLL3_R_ENABLE

◆ STM32_PLL_DIVISOR

#define STM32_PLL_DIVISOR   CONFIG_CLOCK_STM32_PLL_DIVISOR

◆ STM32_PLL_M_DIVISOR

#define STM32_PLL_M_DIVISOR   CONFIG_CLOCK_STM32_PLL_M_DIVISOR

◆ STM32_PLL_MULTIPLIER

#define STM32_PLL_MULTIPLIER   CONFIG_CLOCK_STM32_PLL_MULTIPLIER

◆ STM32_PLL_N_MULTIPLIER

#define STM32_PLL_N_MULTIPLIER   CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER

◆ STM32_PLL_P_DIVISOR

#define STM32_PLL_P_DIVISOR   CONFIG_CLOCK_STM32_PLL_P_DIVISOR

◆ STM32_PLL_PREDIV

#define STM32_PLL_PREDIV   CONFIG_CLOCK_STM32_PLL_PREDIV

◆ STM32_PLL_PREDIV1

#define STM32_PLL_PREDIV1   CONFIG_CLOCK_STM32_PLL_PREDIV1

◆ STM32_PLL_Q_DIVISOR

#define STM32_PLL_Q_DIVISOR   CONFIG_CLOCK_STM32_PLL_Q_DIVISOR

◆ STM32_PLL_R_DIVISOR

#define STM32_PLL_R_DIVISOR   CONFIG_CLOCK_STM32_PLL_R_DIVISOR

◆ STM32_PLL_SRC_HSE

#define STM32_PLL_SRC_HSE   CONFIG_CLOCK_STM32_PLL_SRC_HSE

◆ STM32_PLL_SRC_HSI

#define STM32_PLL_SRC_HSI   CONFIG_CLOCK_STM32_PLL_SRC_HSI

◆ STM32_PLL_SRC_MSI

#define STM32_PLL_SRC_MSI   CONFIG_CLOCK_STM32_PLL_SRC_MSI

◆ STM32_PLL_SRC_PLL2

#define STM32_PLL_SRC_PLL2   CONFIG_CLOCK_STM32_PLL_SRC_PLL2

◆ STM32_PLL_XTPRE

#define STM32_PLL_XTPRE   CONFIG_CLOCK_STM32_PLL_XTPRE

◆ STM32_SYSCLK_SRC_CSI

#define STM32_SYSCLK_SRC_CSI   CONFIG_CLOCK_STM32_SYSCLK_SRC_CSI

◆ STM32_SYSCLK_SRC_HSE

#define STM32_SYSCLK_SRC_HSE   CONFIG_CLOCK_STM32_SYSCLK_SRC_HSE

◆ STM32_SYSCLK_SRC_HSI

#define STM32_SYSCLK_SRC_HSI   CONFIG_CLOCK_STM32_SYSCLK_SRC_HSI

◆ STM32_SYSCLK_SRC_MSI

#define STM32_SYSCLK_SRC_MSI   CONFIG_CLOCK_STM32_SYSCLK_SRC_MSI

◆ STM32_SYSCLK_SRC_PLL

#define STM32_SYSCLK_SRC_PLL   CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL