Zephyr API Documentation  2.7.0-rc2
A Scalable Open Source RTOS
arch.h
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1/*
2 * Copyright (c) 2013-2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
16#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_ARCH_H_
17#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_ARCH_H_
18
19/* Add include for DTS generated information */
20#include <devicetree.h>
21
22/* ARM GPRs are often designated by two different names */
23#define sys_define_gpr_with_alias(name1, name2) union { uint32_t name1, name2; }
24
31#include <arch/common/ffs.h>
35
36#ifdef CONFIG_CPU_CORTEX_M
39#include <arch/common/sys_io.h>
40#elif defined(CONFIG_CPU_CORTEX_R)
44#endif
45
46#ifdef __cplusplus
47extern "C" {
48#endif
49
57#ifdef CONFIG_STACK_ALIGN_DOUBLE_WORD
58#define ARCH_STACK_PTR_ALIGN 8
59#else
60#define ARCH_STACK_PTR_ALIGN 4
61#endif
62
72#if defined(CONFIG_USERSPACE)
73#define Z_THREAD_MIN_STACK_ALIGN CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
74#else
75#define Z_THREAD_MIN_STACK_ALIGN ARCH_STACK_PTR_ALIGN
76#endif
77
118#if defined(CONFIG_MPU_STACK_GUARD)
119#define MPU_GUARD_ALIGN_AND_SIZE CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
120#else
121#define MPU_GUARD_ALIGN_AND_SIZE 0
122#endif
123
134#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) \
135 && defined(CONFIG_MPU_STACK_GUARD)
136#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT
137#else
138#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT 0
139#endif
140
148#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
149#define Z_MPU_GUARD_ALIGN (MAX(MPU_GUARD_ALIGN_AND_SIZE, \
150 MPU_GUARD_ALIGN_AND_SIZE_FLOAT))
151#else
152#define Z_MPU_GUARD_ALIGN MPU_GUARD_ALIGN_AND_SIZE
153#endif
154
155#if defined(CONFIG_USERSPACE) && \
156 defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
157/* This MPU requires regions to be sized to a power of two, and aligned to
158 * their own size. Since an MPU region must be able to cover the entire
159 * user-accessible stack buffer, we size/align to match. The privilege
160 * mode stack is generated elsewhere in memory.
161 */
162#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_POW2_CEIL(size)
163#define ARCH_THREAD_STACK_SIZE_ADJUST(size) Z_POW2_CEIL(size)
164#else
165#define ARCH_THREAD_STACK_OBJ_ALIGN(size) MAX(Z_THREAD_MIN_STACK_ALIGN, \
166 Z_MPU_GUARD_ALIGN)
167#ifdef CONFIG_USERSPACE
168#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
169 ROUND_UP(size, CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
170#endif
171#endif
172
173#ifdef CONFIG_MPU_STACK_GUARD
174/* Kernel-only stacks need an MPU guard region programmed at the beginning of
175 * the stack object, so align the object appropriately.
176 */
177#define ARCH_KERNEL_STACK_RESERVED MPU_GUARD_ALIGN_AND_SIZE
178#define ARCH_KERNEL_STACK_OBJ_ALIGN Z_MPU_GUARD_ALIGN
179#endif
180
181/* On arm, all MPU guards are carve-outs. */
182#define ARCH_THREAD_STACK_RESERVED 0
183
184/* Legacy case: retain containing extern "C" with C++ */
185#ifdef CONFIG_ARM_MPU
186#ifdef CONFIG_CPU_HAS_ARM_MPU
188#endif /* CONFIG_CPU_HAS_ARM_MPU */
189#ifdef CONFIG_CPU_HAS_NXP_MPU
191#endif /* CONFIG_CPU_HAS_NXP_MPU */
192#endif /* CONFIG_ARM_MPU */
193
194#ifdef __cplusplus
195}
196#endif
197
198#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_ARCH_H_ */
ARM AArch32 public interrupt handling.
Per-arch thread definition.
ARM AArch32 public error handling.
ARM AArch32 public exception handling.
ARM AArch32 public kernel miscellaneous.
Devicetree main header.
ARM CORTEX-M memory map.
ARM AArch32 NMI routines.