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st,stm32-otghs

Vendor: STMicroelectronics

Description

These nodes are “usb” bus nodes.

STM32 OTGHS controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

ram-size

int

Size of USB dedicated RAM. STM32 SOC's reference
manual defines a shared FIFO size.

This property is required.

phys

phandle

PHY provider specifier

pinctrl-0

phandles

Pin configuration for USB OTG HS signals (DM/DP/SOF/ID/VBUS and
ULPI_DIR/ULPI_STP/ULPI_NXT/ULPI_D[0-7]).
We expect that the phandles will reference pinctrl nodes.

For example:
   <&usb_otg_hs_dm_pa11 &usb_otg_hs_dp_pa12>;

num-bidir-endpoints

int

Number of bi-directional endpoints supported by hardware
(including EP0)

This property is required.

num-in-endpoints

int

Number of IN endpoints supported by hardware
(including EP0 IN)

num-out-endpoints

int

Number of OUT endpoints supported by hardware
(including EP0 OUT)

maximum-speed

string

Configures USB controllers to work up to a specific speed. Valid arguments are "super-speed", "high-speed", "full-speed" and "low-speed". If this is not passed via DT, USB controllers should use their maximum hardware capability.

Legal values: 'low-speed', 'full-speed', 'high-speed', 'super-speed'

vbus-gpios

phandle-array

Control VBUS via GPIO pin.