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espressif,esp32-spi

Vendor: Espressif Systems

Description

These nodes are “spi” bus nodes.

ESP32 SPI

Properties

Properties not inherited from the base binding file.

Name

Type

Details

miso-pin

int

 
MISO pin

This property is required.

mosi-pin

int

 
MOSI pin

This property is required.

sclk-pin

int

 
SPI generated clock pin

This property is required.

csel-pin

int

 
chip select pin

This property is required.

half-duplex

boolean

 
Enable half-duplex communication mode.

Transmit data before receiving it, instead of simultaneously

dummy-comp

boolean

 
Enable dummy SPI compensation cycles

sio

boolean

 
Enable 3-wire mode

Use MOSI for both sending and receiving data

dma

boolean

 
Enable SPI DMA support

clk-as-cs

boolean

 
Support to toggle the CS while the clock toggles

Output clock on CS line if CS is active

positive-cs

boolean

 
Make CS positive during a transaction instead of negative

clock-frequency

int

 
Clock frequency the SPI peripheral is being driven at, in Hz.

cs-gpios

phandle-array

 
An array of chip select GPIOs to use. Each element
in the array specifies a GPIO. The index in the array
corresponds to the child node that the CS gpio controls.

Example:

  spi@... {
          cs-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>,
                        <&gpio1 10 GPIO_ACTIVE_LOW>,
                        ...;

          spi-device@0 {
                  reg = <0>;
                  ...
          };
          spi-device@1 {
                  reg = <1>;
                  ...
          };
          ...
  };

The child node "spi-device@0" specifies a SPI device with
chip select controller gpio0, pin 23, and devicetree
GPIO flags GPIO_ACTIVE_LOW. Similarly, "spi-device@1" has CS GPIO
controller gpio1, pin 10, and flags GPIO_ACTIVE_LOW. Additional
devices can be configured in the same way.

If unsure about the flags cell, GPIO_ACTIVE_LOW is generally a safe
choice for a typical "CSn" pin. GPIO_ACTIVE_HIGH may be used if
intervening hardware inverts the signal to the peripheral device or
the line itself is active high.

If this property is not defined, no chip select GPIOs are set.
SPI controllers with dedicated CS pins do not need to define
the cs-gpios property.