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atmel,sam-i2c-twim

Vendor: Atmel Corporation

Description

These nodes are “i2c” bus nodes.

Atmel SAM4L Family I2C (TWIM) node

The Atmel Two-wire Master Interface (TWIM) interconnects components on a
unique two-wire bus, made up of one clock line and one data line with speeds
of up to 3.4 Mbit/s, based on a byte-oriented transfer format.  The TWIM is
always a bus master and can transfer sequential or single bytes.  Multiple
master capability is supported.  Arbitration of the bus is performed
internally and relinquishes the bus automatically if the bus arbitration is
lost.

When using speeds above standard mode, user may need adjust clock and data
lines slew and strength parameters.  In general, slew 0 and minimal strength
is enougth for short buses and light loads.  As reference, the below
is the lowest power configuration:

  std-clk-slew-lim = <0>;
  std-clk-strength-low = "0.5";
  std-data-slew-lim = <0>;
  std-data-strength-low = "0.5";

  hs-clk-slew-lim = <0>;
  hs-clk-strength-high = "0.5";
  hs-clk-strength-low = "0.5";
  hs-data-slew-lim = <0>;
  hs-data-strength-low = "0.5";

For best performances, user can tune the slope curves using an osciloscope.
The tuning should be performed by groups defined <mode>-<line>.  The prefix
std-<line> configures fast/fast-plus mode speeds and hs-<line> selects the
high speed mode.  The tune should be performed for both clock and data lines
on both speed modes.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

peripheral-id

int

 
peripheral ID

This property is required.

std-clk-slew-lim

int

 
Slew limit of the TWCK output buffer.  This should be adjusted with
std-clk-strength-low to fine tune the TWCK slope.

This property is required.

Legal values: 0, 1, 2, 3

std-clk-strength-low

string

 
Pull-down drive strength of the TWCK output buffer in fast/fast plus
mode.  This should be adjusted to provide proper TWCK line fall time.
The value represents the port output current in mA when signal on
low level.

This property is required.

Legal values: '0.5', '1.0', '1.6', '3.1', '6.2', '9.3', '15.5', '21.8'

std-data-slew-lim

int

 
Slew limit of the TWD output buffer.  This should be adjusted with
std-data-strength-low to fine tune the TWD slope.

This property is required.

Legal values: 0, 1, 2, 3

std-data-strength-low

string

 
Pull-down drive strength of the TWD output buffer in fast/fast plus
mode.  This should be adjusted to provide proper TWD line fall time.
The value represents the port output current in mA when signal on
low level.

This property is required.

Legal values: '0.5', '1.0', '1.6', '3.1', '6.2', '9.3', '15.5', '21.8'

hs-clk-slew-lim

int

 
Slew limit of the TWCK output buffer in high speed mode.  This
should be adjusted with both hs-clk-strength-high and
hs-clk-strength-low to fine tune the TWCK slope.

This property is required.

Legal values: 0, 1, 2, 3

hs-clk-strength-high

string

 
Pull-up drive strength of the TWCK output buffer in high speed
mode.  This should be adjusted to provide proper TWCK line rise time.
The value represents the port output current in mA when signal on
high level.

This property is required.

Legal values: '0.5', '1.0', '1.5', '3.0'

hs-clk-strength-low

string

 
Pull-down drive strength of the TWCK output buffer in high speed
mode.  This should be adjusted to provide proper TWCK line fall time.
The value represents the port output current in mA when signal on
low level.

This property is required.

Legal values: '0.5', '1.0', '1.6', '3.1', '6.2', '9.3', '15.5', '21.8'

hs-data-slew-lim

int

 
Slew limit of the TWD output buffer in high speed mode.  This
should be adjusted with hs-data-strength-low to fine tune the TWD
slope.

This property is required.

Legal values: 0, 1, 2, 3

hs-data-strength-low

string

 
Pull-down drive strength of the TWD output buffer in high speed
mode.  This should be adjusted to provide proper TWD line fall time.
The value represents the port output current in mA when signal on
low level.

Legal values: '0.5', '1.0', '1.6', '3.1', '6.2', '9.3', '15.5', '21.8'

hs-master-code

int

 
3-bit code to be prefixed with 0b00001 to form a unique
8-bit HS-mode master code (0000 1XXX)

This property is required.

Legal values: 0, 1, 2, 3, 4, 5, 6, 7

pinctrl-0

phandles

 
GPIO pin configuration for TWCK & TWD signals. We expect that
the phandles will reference pinctrl nodes. These nodes will
have a nodelabel that matches the Atmel SoC HAL defines and
be of the form p<port><pin><periph>_<inst>_<signal>.

For example the I2C on SAM4L would be
   pinctrl-0 = <&pb0a_twi1_twd1 &pb1a_twi1_twck1>;

This property is required.

clock-frequency

int

 
Initial clock frequency in Hz