Zephyr API Documentation
2.7.0-rc2
A Scalable Open Source RTOS
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Macros | |
#define | NPCX_PSL_MODE_EDGE (1 << 0) |
NPCX specific PIN configuration flag. More... | |
#define | NPCX_PSL_MODE_LEVEL (1 << 1) |
#define | NPCX_PSL_ACTIVE_HIGH (1 << 2) |
#define | NPCX_PSL_ACTIVE_LOW (1 << 3) |
#define | NPCX_PSL_RISING_EDGE (NPCX_PSL_MODE_EDGE | NPCX_PSL_ACTIVE_HIGH) |
#define | NPCX_PSL_FALLING_EDGE (NPCX_PSL_MODE_EDGE | NPCX_PSL_ACTIVE_LOW) |
#define | NPCX_PSL_LEVEL_HIGH (NPCX_PSL_MODE_LEVEL | NPCX_PSL_ACTIVE_HIGH) |
#define | NPCX_PSL_LEVEL_LOW (NPCX_PSL_MODE_LEVEL | NPCX_PSL_ACTIVE_LOW) |
#define NPCX_PSL_ACTIVE_HIGH (1 << 2) |
#define NPCX_PSL_ACTIVE_LOW (1 << 3) |
#define NPCX_PSL_FALLING_EDGE (NPCX_PSL_MODE_EDGE | NPCX_PSL_ACTIVE_LOW) |
#define NPCX_PSL_LEVEL_HIGH (NPCX_PSL_MODE_LEVEL | NPCX_PSL_ACTIVE_HIGH) |
#define NPCX_PSL_LEVEL_LOW (NPCX_PSL_MODE_LEVEL | NPCX_PSL_ACTIVE_LOW) |
#define NPCX_PSL_MODE_EDGE (1 << 0) |
NPCX specific PIN configuration flag.
Pin configuration is coded with the following fields Power Switch Logic (PSL) [ 0 : 3 ] Reserved [ 4 : 31]
Applicable to NPCX7 series.
#define NPCX_PSL_MODE_LEVEL (1 << 1) |
#define NPCX_PSL_RISING_EDGE (NPCX_PSL_MODE_EDGE | NPCX_PSL_ACTIVE_HIGH) |