Macros
#define	MPU_RBAR_ADDR_Msk (~0x1f)

#define	MPU_RASR_ENABLE_Msk (1)

#define	MPU_RASR_SIZE_Pos 1U

#define	MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos)

#define	MPU_TYPE_DREGION_Pos 8U

#define	MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos)

#define	MPU_RASR_XN_Pos 12

#define	MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos)

#define	MPU_RASR_AP_Pos 8

#define	MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos)

#define	MPU_RASR_TEX_Pos 3

#define	MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos)

#define	MPU_RASR_S_Pos 2

#define	MPU_RASR_S_Msk (1UL << MPU_RASR_C_Pos)

#define	MPU_RASR_C_Pos 1

#define	MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos)

#define	MPU_RASR_B_Pos 0

#define	MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos)

#define	ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U)

#define	ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U)

#define	ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U)

#define	ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0aU)

#define	ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0bU)

#define	ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0cU)

#define	ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0dU)

#define	ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0eU)

#define	ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0fU)

#define	ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U)

#define	ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U)

#define	ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U)

#define	ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U)

#define	ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U)

#define	ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U)

#define	ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U)

#define	ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U)

#define	ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U)

#define	ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U)

#define	ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1aU)

#define	ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1bU)

#define	ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1cU)

#define	ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1dU)

#define	ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1eU)

#define	ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1fU)

Macro Definition Documentation

◆ ARM_MPU_REGION_SIZE_128KB

#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U)

◆ ARM_MPU_REGION_SIZE_128MB

#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1aU)

◆ ARM_MPU_REGION_SIZE_16KB

#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0dU)

◆ ARM_MPU_REGION_SIZE_16MB

#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U)

◆ ARM_MPU_REGION_SIZE_1GB

#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1dU)

◆ ARM_MPU_REGION_SIZE_1KB

#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U)

◆ ARM_MPU_REGION_SIZE_1MB

#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U)

◆ ARM_MPU_REGION_SIZE_256B

#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U)

◆ ARM_MPU_REGION_SIZE_256KB

#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U)

◆ ARM_MPU_REGION_SIZE_256MB

#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1bU)

◆ ARM_MPU_REGION_SIZE_2GB

#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1eU)

◆ ARM_MPU_REGION_SIZE_2KB

#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0aU)

◆ ARM_MPU_REGION_SIZE_2MB

#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U)

◆ ARM_MPU_REGION_SIZE_32KB

#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0eU)

◆ ARM_MPU_REGION_SIZE_32MB

#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U)

◆ ARM_MPU_REGION_SIZE_4GB

#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1fU)

◆ ARM_MPU_REGION_SIZE_4KB

#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0bU)

◆ ARM_MPU_REGION_SIZE_4MB

#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U)

◆ ARM_MPU_REGION_SIZE_512B

#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U)

◆ ARM_MPU_REGION_SIZE_512KB

#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U)

◆ ARM_MPU_REGION_SIZE_512MB

#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1cU)

◆ ARM_MPU_REGION_SIZE_64KB

#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0fU)

◆ ARM_MPU_REGION_SIZE_64MB

#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U)

◆ ARM_MPU_REGION_SIZE_8KB

#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0cU)

◆ ARM_MPU_REGION_SIZE_8MB

#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U)

◆ MPU_RASR_AP_Msk

#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos)

◆ MPU_RASR_AP_Pos

#define MPU_RASR_AP_Pos 8

◆ MPU_RASR_B_Msk

#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos)

◆ MPU_RASR_B_Pos

#define MPU_RASR_B_Pos 0

◆ MPU_RASR_C_Msk

#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos)

◆ MPU_RASR_C_Pos

#define MPU_RASR_C_Pos 1

◆ MPU_RASR_ENABLE_Msk

#define MPU_RASR_ENABLE_Msk (1)

◆ MPU_RASR_S_Msk

#define MPU_RASR_S_Msk (1UL << MPU_RASR_C_Pos)

◆ MPU_RASR_S_Pos

#define MPU_RASR_S_Pos 2

◆ MPU_RASR_SIZE_Msk

#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos)

◆ MPU_RASR_SIZE_Pos

#define MPU_RASR_SIZE_Pos 1U

◆ MPU_RASR_TEX_Msk

#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos)

◆ MPU_RASR_TEX_Pos

#define MPU_RASR_TEX_Pos 3

◆ MPU_RASR_XN_Msk

#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos)

◆ MPU_RASR_XN_Pos

#define MPU_RASR_XN_Pos 12

◆ MPU_RBAR_ADDR_Msk

#define MPU_RBAR_ADDR_Msk (~0x1f)

◆ MPU_TYPE_DREGION_Msk

#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos)

◆ MPU_TYPE_DREGION_Pos

#define MPU_TYPE_DREGION_Pos 8U

Macros