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◆ IOCON_ADMODE_EN
#define IOCON_ADMODE_EN (0 << 7) /* Enable analog input mode. */ |
◆ IOCON_CLKDIV0
#define IOCON_CLKDIV0 (0 << 13) |
◆ IOCON_CLKDIV1
#define IOCON_CLKDIV1 (1 << 13) |
◆ IOCON_CLKDIV2
#define IOCON_CLKDIV2 (2 << 13) |
◆ IOCON_CLKDIV3
#define IOCON_CLKDIV3 (3 << 13) |
◆ IOCON_CLKDIV4
#define IOCON_CLKDIV4 (4 << 13) |
◆ IOCON_CLKDIV5
#define IOCON_CLKDIV5 (5 << 13) |
◆ IOCON_CLKDIV6
#define IOCON_CLKDIV6 (6 << 13) |
◆ IOCON_DIGMODE_EN
#define IOCON_DIGMODE_EN (1 << 7) /* Enable digital I/O mode. */ |
◆ IOCON_FASTI2C_EN
#define IOCON_FASTI2C_EN (2 << 8) /* I2C Fast-mode Plus. */ |
◆ IOCON_FILTR_DIS
#define IOCON_FILTR_DIS (1 << 8) /* Disable noise filtering. */ |
◆ IOCON_FUNC0
Pin control register for standard digital I/O pins:
[0:2] function. [3:4] mode. [5] hysteresis. [6] invert input. [7:9] reserved. [10] open-drain mode. [11:12] digital filter sample mode. [13:15] clock divisor. [16:31] reserved.
Control registers for digital/analog I/O pins:
[0:2] function. [3:4] mode. [5] hysteresis. [6] invert input. [7] analog mode. [8] input glitch filter. [9] reserved. [10] open-drain mode. [11:12] digital filter sample mode. [13:15] clock divisor. [16:31] reserved.
Control registers for open-drain I/O pins (I2C):
[0:2] function. [3:7] reserved. [8:9] I2C mode. [10] reserved. [11:12] digital filter sample mode. [13:15] clock divisor. [16:31] reserved.
◆ IOCON_FUNC1
◆ IOCON_FUNC2
◆ IOCON_FUNC3
◆ IOCON_FUNC4
◆ IOCON_FUNC5
◆ IOCON_HYS_EN
#define IOCON_HYS_EN (1 << 5) /* Enable hysteresis. */ |
◆ IOCON_INV_EN
#define IOCON_INV_EN (1 << 6) /* Invert input polarity. */ |
◆ IOCON_MODE_INACT
#define IOCON_MODE_INACT (0 << 3) /* No pull resistor. */ |
◆ IOCON_MODE_PULLDOWN
#define IOCON_MODE_PULLDOWN (1 << 3) /* Enable pull-down resistor. */ |
◆ IOCON_MODE_PULLUP
#define IOCON_MODE_PULLUP (2 << 3) /* Enable Pull-up resistor. */ |
◆ IOCON_MODE_REPEATER
#define IOCON_MODE_REPEATER (3 << 3) /* Repeater mode. */ |
◆ IOCON_OPENDRAIN_EN
#define IOCON_OPENDRAIN_EN (1 << 10) /* Enable open-drain mode. */ |
◆ IOCON_S_MODE_0CLK
#define IOCON_S_MODE_0CLK (0 << 11) /* No input filter. */ |
◆ IOCON_S_MODE_1CLK
#define IOCON_S_MODE_1CLK (1 << 11) |
◆ IOCON_S_MODE_2CLK
#define IOCON_S_MODE_2CLK (2 << 11) |
◆ IOCON_S_MODE_3CLK
#define IOCON_S_MODE_3CLK (3 << 11) |
◆ IOCON_SFI2C_EN
#define IOCON_SFI2C_EN (0 << 8) /* I2C standard mode / Fast-mode. */ |
◆ IOCON_STDI2C_EN
#define IOCON_STDI2C_EN (1 << 8) /* GPIO functionality. */ |