7#ifndef ZEPHYR_INCLUDE_CACHE_H_
8#define ZEPHYR_INCLUDE_CACHE_H_
27#define K_CACHE_WB BIT(0)
28#define K_CACHE_INVD BIT(1)
29#define K_CACHE_WB_INVD (K_CACHE_WB | K_CACHE_INVD)
31#if defined(CONFIG_HAS_EXTERNAL_CACHE)
63#define cache_data_enable arch_dcache_enable
64#define cache_data_disable arch_dcache_disable
65#define cache_instr_enable arch_icache_enable
66#define cache_instr_disable arch_icache_disable
67#define cache_data_all(op) arch_dcache_all(op)
68#define cache_data_range(addr, size, op) arch_dcache_range(addr, size, op)
69#define cache_instr_all(op) arch_icache_all(op)
70#define cache_instr_range(addr, size, op) arch_icache_range(addr, size, op)
71#define cache_data_line_size_get arch_dcache_line_size_get
72#define cache_instr_line_size_get arch_icache_line_size_get
77static inline int z_impl_sys_cache_data_all(
int op)
79#if defined(CONFIG_CACHE_MANAGEMENT)
88static inline int z_impl_sys_cache_data_range(
void *addr,
size_t size,
int op)
90#if defined(CONFIG_CACHE_MANAGEMENT)
101static inline int z_impl_sys_cache_instr_all(
int op)
103#if defined(CONFIG_CACHE_MANAGEMENT)
112static inline int z_impl_sys_cache_instr_range(
void *addr,
size_t size,
int op)
114#if defined(CONFIG_CACHE_MANAGEMENT)
124#ifdef CONFIG_LIBMETAL
125static inline void sys_cache_flush(
void *addr,
size_t size)
131#define CPU DT_PATH(cpus, cpu_0)
143#ifdef CONFIG_DCACHE_LINE_SIZE_DETECT
145#elif (CONFIG_DCACHE_LINE_SIZE != 0)
146 return CONFIG_DCACHE_LINE_SIZE;
162#ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
164#elif (CONFIG_ICACHE_LINE_SIZE != 0)
165 return CONFIG_ICACHE_LINE_SIZE;
171#include <syscalls/cache.h>
#define cache_data_all(op)
Definition: cache.h:67
#define cache_data_range(addr, size, op)
Definition: cache.h:68
#define cache_instr_range(addr, size, op)
Definition: cache.h:70
#define cache_instr_disable
Definition: cache.h:66
#define cache_instr_enable
Definition: cache.h:65
#define K_CACHE_WB
Definition: cache.h:27
int sys_cache_data_all(int op)
#define cache_instr_all(op)
Definition: cache.h:69
int sys_cache_instr_range(void *addr, size_t size, int op)
int sys_cache_instr_all(int op)
static size_t sys_cache_data_line_size_get(void)
Get the d-cache line size.
Definition: cache.h:141
int sys_cache_data_range(void *addr, size_t size, int op)
#define CPU
Definition: cache.h:131
#define cache_data_enable
Definition: cache.h:63
static size_t sys_cache_instr_line_size_get(void)
Definition: cache.h:160
#define cache_instr_line_size_get
Definition: cache.h:72
#define cache_data_disable
Definition: cache.h:64
#define cache_data_line_size_get
Definition: cache.h:71
#define DT_PROP_OR(node_id, prop, default_value)
Like DT_PROP(), but with a fallback to default_value.
Definition: devicetree.h:640
#define ENOTSUP
Definition: errno.h:115