mcux_lpc_syscon_clock.h

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/*
 * Copyright (c) 2020, NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_
 
#define MCUX_FLEXCOMM0_CLK              0
#define MCUX_FLEXCOMM1_CLK              1
#define MCUX_FLEXCOMM2_CLK              2
#define MCUX_FLEXCOMM3_CLK              3
#define MCUX_FLEXCOMM4_CLK              4
#define MCUX_FLEXCOMM5_CLK              5
#define MCUX_FLEXCOMM6_CLK              6
#define MCUX_FLEXCOMM7_CLK              7
#define MCUX_HS_SPI_CLK         8
#define MCUX_USDHC1_CLK         9
#define MCUX_USDHC2_CLK         10
 
#define MCUX_CTIMER_CLK_OFFSET  11
 
#define MCUX_CTIMER0_CLK                0
#define MCUX_CTIMER1_CLK                1
#define MCUX_CTIMER2_CLK                2
#define MCUX_CTIMER3_CLK                3
#define MCUX_CTIMER4_CLK                4
 
 
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */