Zephyr API Documentation  2.7.0-rc2
A Scalable Open Source RTOS
float_regs_x86_gcc.h
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1
6/*
7 * Copyright (c) 2015, Wind River Systems, Inc.
8 *
9 * SPDX-License-Identifier: Apache-2.0
10 */
11
12#ifndef _FLOAT_REGS_X86_GCC_H
13#define _FLOAT_REGS_X86_GCC_H
14
15#if !defined(__GNUC__) || !defined(CONFIG_X86)
16#error __FILE__ goes only with x86 GCC
17#endif
18
19#include <toolchain.h>
20#include "float_context.h"
21
40static inline void _load_all_float_registers(struct fp_register_set *regs)
41{
42 __asm__ volatile (
43 "movdqu 0(%0), %%xmm0\n\t;"
44 "movdqu 16(%0), %%xmm1\n\t;"
45 "movdqu 32(%0), %%xmm2\n\t;"
46 "movdqu 48(%0), %%xmm3\n\t;"
47 "movdqu 64(%0), %%xmm4\n\t;"
48 "movdqu 80(%0), %%xmm5\n\t;"
49 "movdqu 96(%0), %%xmm6\n\t;"
50 "movdqu 112(%0), %%xmm7\n\t;"
51
52 "fldt 128(%0)\n\t;"
53 "fldt 138(%0)\n\t;"
54 "fldt 148(%0)\n\t;"
55 "fldt 158(%0)\n\t;"
56 "fldt 168(%0)\n\t;"
57 "fldt 178(%0)\n\t;"
58 "fldt 188(%0)\n\t;"
59 "fldt 198(%0)\n\t;"
60
61 : : "r" (regs)
62 );
63}
64
65
84static inline void
85_load_then_store_all_float_registers(struct fp_register_set *regs)
86{
87 __asm__ volatile (
88 "movdqu 0(%0), %%xmm0\n\t;"
89 "movdqu 16(%0), %%xmm1\n\t;"
90 "movdqu 32(%0), %%xmm2\n\t;"
91 "movdqu 48(%0), %%xmm3\n\t;"
92 "movdqu 64(%0), %%xmm4\n\t;"
93 "movdqu 80(%0), %%xmm5\n\t;"
94 "movdqu 96(%0), %%xmm6\n\t;"
95 "movdqu 112(%0), %%xmm7\n\t;"
96
97 "fldt 128(%0)\n\t;"
98 "fldt 138(%0)\n\t;"
99 "fldt 148(%0)\n\t;"
100 "fldt 158(%0)\n\t;"
101 "fldt 168(%0)\n\t;"
102 "fldt 178(%0)\n\t;"
103 "fldt 188(%0)\n\t;"
104 "fldt 198(%0)\n\t;"
105
106 /* pop the x87 FPU registers back to memory */
107
108 "fstpt 198(%0)\n\t;"
109 "fstpt 188(%0)\n\t;"
110 "fstpt 178(%0)\n\t;"
111 "fstpt 168(%0)\n\t;"
112 "fstpt 158(%0)\n\t;"
113 "fstpt 148(%0)\n\t;"
114 "fstpt 138(%0)\n\t;"
115 "fstpt 128(%0)\n\t;"
116
117 : : "r" (regs)
118 );
119}
120
121
134static inline void _store_all_float_registers(struct fp_register_set *regs)
135{
136 __asm__ volatile (
137 "movdqu %%xmm0, 0(%0)\n\t;"
138 "movdqu %%xmm1, 16(%0)\n\t;"
139 "movdqu %%xmm2, 32(%0)\n\t;"
140 "movdqu %%xmm3, 48(%0)\n\t;"
141 "movdqu %%xmm4, 64(%0)\n\t;"
142 "movdqu %%xmm5, 80(%0)\n\t;"
143 "movdqu %%xmm6, 96(%0)\n\t;"
144 "movdqu %%xmm7, 112(%0)\n\t;"
145
146 "fstpt 198(%0)\n\t;"
147 "fstpt 188(%0)\n\t;"
148 "fstpt 178(%0)\n\t;"
149 "fstpt 168(%0)\n\t;"
150 "fstpt 158(%0)\n\t;"
151 "fstpt 148(%0)\n\t;"
152 "fstpt 138(%0)\n\t;"
153 "fstpt 128(%0)\n\t;"
154
155 : : "r" (regs) : "memory"
156 );
157}
158#endif /* _FLOAT_REGS_X86_GCC_H */
float_context.h
common definitions for the FPU sharing test application
fp_register_set
Definition: float_context.h:164
toolchain.h
Macros to abstract toolchain specific capabilities.