spi.h

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/*
 * Copyright (c) 2015 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_DRIVERS_SPI_H_
#define ZEPHYR_INCLUDE_DRIVERS_SPI_H_
 
#include <zephyr/types.h>
#include <stddef.h>
#include <device.h>
#include <drivers/gpio.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define SPI_OP_MODE_MASTER      0
#define SPI_OP_MODE_SLAVE       BIT(0)
#define SPI_OP_MODE_MASK        0x1
#define SPI_OP_MODE_GET(_operation_) ((_operation_) & SPI_OP_MODE_MASK)
 
#define SPI_MODE_CPOL           BIT(1)
 
#define SPI_MODE_CPHA           BIT(2)
 
#define SPI_MODE_LOOP           BIT(3)
 
#define SPI_MODE_MASK           (0xE)
#define SPI_MODE_GET(_mode_)                    \
        ((_mode_) & SPI_MODE_MASK)
 
#define SPI_TRANSFER_MSB        (0)
#define SPI_TRANSFER_LSB        BIT(4)
 
#define SPI_WORD_SIZE_SHIFT     (5)
#define SPI_WORD_SIZE_MASK      (0x3F << SPI_WORD_SIZE_SHIFT)
#define SPI_WORD_SIZE_GET(_operation_)                                  \
        (((_operation_) & SPI_WORD_SIZE_MASK) >> SPI_WORD_SIZE_SHIFT)
 
#define SPI_WORD_SET(_word_size_)               \
        ((_word_size_) << SPI_WORD_SIZE_SHIFT)
 
#define SPI_LINES_SINGLE        (0 << 11)
#define SPI_LINES_DUAL          (1 << 11)
#define SPI_LINES_QUAD          (2 << 11)
#define SPI_LINES_OCTAL         (3 << 11)
 
#define SPI_LINES_MASK          (0x3 << 11)
 
/* Requests - if possible - to keep CS asserted after the transaction */
#define SPI_HOLD_ON_CS          BIT(13)
/* Keep the device locked after the transaction for the current config.
 * Use this with extreme caution (see spi_release() below) as it will
 * prevent other callers to access the SPI device until spi_release() is
 * properly called.
 */
#define SPI_LOCK_ON             BIT(14)
 
/* Active high logic on CS - Usually, and by default, CS logic is active
 * low. However, some devices may require the reverse logic: active high.
 * This bit will request the controller to use that logic. Note that not
 * all controllers are able to handle that natively. In this case deferring
 * the CS control to a gpio line through struct spi_cs_control would be
 * the solution.
 */
#define SPI_CS_ACTIVE_HIGH      BIT(15)
 
struct spi_cs_control {
        const struct device     *gpio_dev;
        uint32_t                delay;
        gpio_pin_t              gpio_pin;
        gpio_dt_flags_t         gpio_dt_flags;
};
 
#ifndef __cplusplus
#define SPI_CS_CONTROL_PTR_DT(node_id, delay_)                          \
        (&(struct spi_cs_control) {                                             \
                .gpio_dev = DEVICE_DT_GET(                              \
                        DT_SPI_DEV_CS_GPIOS_CTLR(node_id)),             \
                .delay = (delay_),                                      \
                .gpio_pin = DT_SPI_DEV_CS_GPIOS_PIN(node_id),           \
                .gpio_dt_flags = DT_SPI_DEV_CS_GPIOS_FLAGS(node_id),    \
        })
 
#define SPI_CS_CONTROL_PTR_DT_INST(inst, delay_)                \
        SPI_CS_CONTROL_PTR_DT(DT_DRV_INST(inst), delay_)
#endif
 
struct spi_config {
        uint32_t                frequency;
        uint16_t                operation;
        uint16_t                slave;
 
        const struct spi_cs_control *cs;
};
 
#ifndef __cplusplus
#define SPI_CONFIG_DT(node_id, operation_, delay_)                      \
        {                                                               \
                .frequency = DT_PROP(node_id, spi_max_frequency),       \
                .operation = (operation_),                              \
                .slave = DT_REG_ADDR(node_id),                          \
                .cs = COND_CODE_1(                                      \
                        DT_SPI_DEV_HAS_CS_GPIOS(node_id),               \
                        (SPI_CS_CONTROL_PTR_DT(node_id, delay_)),       \
                        (NULL)),                                        \
        }
 
#define SPI_CONFIG_DT_INST(inst, operation_, delay_)    \
        SPI_CONFIG_DT(DT_DRV_INST(inst), operation_, delay_)
#endif
 
struct spi_dt_spec {
        const struct device *bus;
        struct spi_config config;
};
 
#ifndef __cplusplus
#define SPI_DT_SPEC_GET(node_id, operation_, delay_)                 \
        {                                                            \
                .bus = DEVICE_DT_GET(DT_BUS(node_id)),               \
                .config = SPI_CONFIG_DT(node_id, operation_, delay_) \
        }
 
#define SPI_DT_SPEC_INST_GET(inst, operation_, delay_) \
        SPI_DT_SPEC_GET(DT_DRV_INST(inst), operation_, delay_)
#endif
 
struct spi_buf {
        void *buf;
        size_t len;
};
 
struct spi_buf_set {
        const struct spi_buf *buffers;
        size_t count;
};
 
typedef int (*spi_api_io)(const struct device *dev,
                          const struct spi_config *config,
                          const struct spi_buf_set *tx_bufs,
                          const struct spi_buf_set *rx_bufs);
 
typedef int (*spi_api_io_async)(const struct device *dev,
                                const struct spi_config *config,
                                const struct spi_buf_set *tx_bufs,
                                const struct spi_buf_set *rx_bufs,
                                struct k_poll_signal *async);
 
typedef int (*spi_api_release)(const struct device *dev,
                               const struct spi_config *config);
 
 
__subsystem struct spi_driver_api {
        spi_api_io transceive;
#ifdef CONFIG_SPI_ASYNC
        spi_api_io_async transceive_async;
#endif /* CONFIG_SPI_ASYNC */
        spi_api_release release;
};
 
static inline bool spi_is_ready(const struct spi_dt_spec *spec)
{
        /* Validate bus is ready */
        if (!device_is_ready(spec->bus)) {
                return false;
        }
        /* Validate CS gpio port is ready, if it is used */
        if (spec->config.cs &&
            !device_is_ready(spec->config.cs->gpio_dev)) {
                return false;
        }
        return true;
}
 
__syscall int spi_transceive(const struct device *dev,
                             const struct spi_config *config,
                             const struct spi_buf_set *tx_bufs,
                             const struct spi_buf_set *rx_bufs);
 
static inline int z_impl_spi_transceive(const struct device *dev,
                                        const struct spi_config *config,
                                        const struct spi_buf_set *tx_bufs,
                                        const struct spi_buf_set *rx_bufs)
{
        const struct spi_driver_api *api =
                (const struct spi_driver_api *)dev->api;
 
        return api->transceive(dev, config, tx_bufs, rx_bufs);
}
 
static inline int spi_transceive_dt(const struct spi_dt_spec *spec,
                                    const struct spi_buf_set *tx_bufs,
                                    const struct spi_buf_set *rx_bufs)
{
        return spi_transceive(spec->bus, &spec->config, tx_bufs, rx_bufs);
}
 
static inline int spi_read(const struct device *dev,
                           const struct spi_config *config,
                           const struct spi_buf_set *rx_bufs)
{
        return spi_transceive(dev, config, NULL, rx_bufs);
}
 
static inline int spi_read_dt(const struct spi_dt_spec *spec,
                              const struct spi_buf_set *rx_bufs)
{
        return spi_read(spec->bus, &spec->config, rx_bufs);
}
 
static inline int spi_write(const struct device *dev,
                            const struct spi_config *config,
                            const struct spi_buf_set *tx_bufs)
{
        return spi_transceive(dev, config, tx_bufs, NULL);
}
 
static inline int spi_write_dt(const struct spi_dt_spec *spec,
                               const struct spi_buf_set *tx_bufs)
{
        return spi_write(spec->bus, &spec->config, tx_bufs);
}
 
/* Doxygen defines this so documentation is generated. */
#ifdef CONFIG_SPI_ASYNC
 
static inline int spi_transceive_async(const struct device *dev,
                                       const struct spi_config *config,
                                       const struct spi_buf_set *tx_bufs,
                                       const struct spi_buf_set *rx_bufs,
                                       struct k_poll_signal *async)
{
        const struct spi_driver_api *api =
                (const struct spi_driver_api *)dev->api;
 
        return api->transceive_async(dev, config, tx_bufs, rx_bufs, async);
}
 
static inline int spi_read_async(const struct device *dev,
                                 const struct spi_config *config,
                                 const struct spi_buf_set *rx_bufs,
                                 struct k_poll_signal *async)
{
        return spi_transceive_async(dev, config, NULL, rx_bufs, async);
}
 
static inline int spi_write_async(const struct device *dev,
                                  const struct spi_config *config,
                                  const struct spi_buf_set *tx_bufs,
                                  struct k_poll_signal *async)
{
        return spi_transceive_async(dev, config, tx_bufs, NULL, async);
}
#endif /* CONFIG_SPI_ASYNC */
 
__syscall int spi_release(const struct device *dev,
                          const struct spi_config *config);
 
static inline int z_impl_spi_release(const struct device *dev,
                                     const struct spi_config *config)
{
        const struct spi_driver_api *api =
                (const struct spi_driver_api *)dev->api;
 
        return api->release(dev, config);
}
 
static inline int spi_release_dt(const struct spi_dt_spec *spec)
{
        return spi_release(spec->bus, &spec->config);
}
 
#ifdef __cplusplus
}
#endif
 
#include <syscalls/spi.h>
 
#endif /* ZEPHYR_INCLUDE_DRIVERS_SPI_H_ */