Zephyr API Documentation  2.7.0-rc2
A Scalable Open Source RTOS
dma_stm32.h
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1/*
2 * Copyright (c) 2021 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DRIVERS_DMA_STM32_H_
8#define ZEPHYR_INCLUDE_DRIVERS_DMA_STM32_H_
9
10/* @brief linked_channel value to inform zephyr dma driver that
11 * DMA channel will be handled by HAL
12 */
13#define STM32_DMA_HAL_OVERRIDE 0x7F
14
15/* macro for dma slot (only for dma-v1 or dma-v2 types) */
16#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dma_v2bis)
17#define STM32_DMA_SLOT(id, dir, slot) 0
18#else
19#define STM32_DMA_SLOT(id, dir, slot) DT_INST_DMAS_CELL_BY_NAME(id, dir, slot)
20#endif
21
22#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dma_v2) || \
23 DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dma_v2bis) || \
24 DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dmamux)
25#define STM32_DMA_FEATURES(id, dir) 0
26#else
27#define STM32_DMA_FEATURES(id, dir) \
28 DT_INST_DMAS_CELL_BY_NAME(id, dir, features)
29#endif
30
31#define STM32_DMA_CTLR(id, dir) \
32 DT_INST_DMAS_CTLR_BY_NAME(id, dir)
33#define STM32_DMA_CHANNEL_CONFIG(id, dir) \
34 DT_INST_DMAS_CELL_BY_NAME(id, dir, channel_config)
35
36/* macros for channel-config */
37/* direction defined on bits 6-7 */
38/* 0 -> MEM_TO_MEM, 1 -> MEM_TO_PERIPH, 2 -> PERIPH_TO_MEM */
39#define STM32_DMA_CONFIG_DIRECTION(config) ((config >> 6) & 0x3)
40/* periph increment defined on bit 9 as true/false */
41#define STM32_DMA_CONFIG_PERIPHERAL_ADDR_INC(config) ((config >> 9) & 0x1)
42/* mem increment defined on bit 10 as true/false */
43#define STM32_DMA_CONFIG_MEMORY_ADDR_INC(config) ((config >> 10) & 0x1)
44/* perih data size defined on bits 11-12 */
45/* 0 -> 1 byte, 1 -> 2 bytes, 2 -> 4 bytes */
46#define STM32_DMA_CONFIG_PERIPHERAL_DATA_SIZE(config) \
47 (1 << ((config >> 11) & 0x3))
48/* memory data size defined on bits 13, 14 */
49/* 0 -> 1 byte, 1 -> 2 bytes, 2 -> 4 bytes */
50#define STM32_DMA_CONFIG_MEMORY_DATA_SIZE(config) \
51 (1 << ((config >> 13) & 0x3))
52/* priority increment offset defined on bit 15 */
53#define STM32_DMA_CONFIG_PERIPHERAL_INC_FIXED(config) ((config >> 15) & 0x1)
54/* priority defined on bits 16-17 as 0, 1, 2, 3 */
55#define STM32_DMA_CONFIG_PRIORITY(config) ((config >> 16) & 0x3)
56
57/* macro for features (only for dma-v1) */
58#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_dma_v1)
59#define STM32_DMA_FEATURES_FIFO_THRESHOLD(features) (features & 0x3)
60#else
61#define STM32_DMA_FEATURES_FIFO_THRESHOLD(features) 0
62#endif
63
64#endif /* ZEPHYR_INCLUDE_DRIVERS_DMA_STM32_H_ */