Zephyr API Documentation  2.7.0-rc2
A Scalable Open Source RTOS
irq.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2014 Wind River Systems, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
14#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_IRQ_H_
15#define ZEPHYR_INCLUDE_ARCH_ARC_V2_IRQ_H_
16
18#include <toolchain/common.h>
19#include <irq.h>
20#include <sys/util.h>
21#include <sw_isr_table.h>
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27#ifndef _ASMLANGUAGE
28
29extern void z_arc_firq_stack_set(void);
30extern void arch_irq_enable(unsigned int irq);
31extern void arch_irq_disable(unsigned int irq);
32extern int arch_irq_is_enabled(unsigned int irq);
33#ifdef CONFIG_TRACING_ISR
34extern void sys_trace_isr_enter(void);
35extern void sys_trace_isr_exit(void);
36#endif
37
38extern void z_irq_priority_set(unsigned int irq, unsigned int prio,
40extern void _isr_wrapper(void);
41extern void z_irq_spurious(const void *unused);
42
43/* Z_ISR_DECLARE will populate the .intList section with the interrupt's
44 * parameters, which will then be used by gen_irq_tables.py to create
45 * the vector table and the software ISR table. This is all done at
46 * build-time.
47 *
48 * We additionally set the priority in the interrupt controller at
49 * runtime.
50 */
51#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
52{ \
53 Z_ISR_DECLARE(irq_p, 0, isr_p, isr_param_p); \
54 z_irq_priority_set(irq_p, priority_p, flags_p); \
55}
56
78#define ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
79{ \
80 Z_ISR_DECLARE(irq_p, ISR_FLAG_DIRECT, isr_p, NULL); \
81 BUILD_ASSERT(priority_p || !IS_ENABLED(CONFIG_ARC_FIRQ) || \
82 (IS_ENABLED(CONFIG_ARC_FIRQ_STACK) && \
83 !IS_ENABLED(CONFIG_ARC_STACK_CHECKING)), \
84 "irq priority cannot be set to 0 when CONFIG_ARC_FIRQ_STACK" \
85 "is not configured or CONFIG_ARC_FIRQ_STACK " \
86 "and CONFIG_ARC_STACK_CHECKING are configured together"); \
87 z_irq_priority_set(irq_p, priority_p, flags_p); \
88}
89
90
91static inline void arch_isr_direct_header(void)
92{
93#ifdef CONFIG_TRACING_ISR
95#endif
96}
97
98static inline void arch_isr_direct_footer(int maybe_swap)
99{
100 /* clear SW generated interrupt */
101 if (z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE) ==
102 z_arc_v2_aux_reg_read(_ARC_V2_AUX_IRQ_HINT)) {
103 z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_HINT, 0);
104 }
105#ifdef CONFIG_TRACING_ISR
107#endif
108}
109
110#define ARCH_ISR_DIRECT_HEADER() arch_isr_direct_header()
111extern void arch_isr_direct_header(void);
112
113#define ARCH_ISR_DIRECT_FOOTER(swap) arch_isr_direct_footer(swap)
114
115#if defined(__CCAC__)
116#define _ARC_DIRECT_ISR_FUNC_ATTRIBUTE __interrupt__
117#else
118#define _ARC_DIRECT_ISR_FUNC_ATTRIBUTE interrupt("ilink")
119#endif
120
121/*
122 * Scheduling can not be done in direct isr. If required, please use kernel
123 * aware interrupt handling
124 */
125#define ARCH_ISR_DIRECT_DECLARE(name) \
126 static inline int name##_body(void); \
127 __attribute__ ((_ARC_DIRECT_ISR_FUNC_ATTRIBUTE))void name(void) \
128 { \
129 ISR_DIRECT_HEADER(); \
130 name##_body(); \
131 ISR_DIRECT_FOOTER(0); \
132 } \
133 static inline int name##_body(void)
134
135
168static ALWAYS_INLINE unsigned int arch_irq_lock(void)
169{
170 unsigned int key;
171
172 __asm__ volatile("clri %0" : "=r"(key):: "memory");
173 return key;
174}
175
176static ALWAYS_INLINE void arch_irq_unlock(unsigned int key)
177{
178 __asm__ volatile("seti %0" : : "ir"(key) : "memory");
179}
180
181static ALWAYS_INLINE bool arch_irq_unlocked(unsigned int key)
182{
183 /* ARC irq lock uses instruction "clri r0",
184 * r0 == {26’d0, 1’b1, STATUS32.IE, STATUS32.E[3:0] }
185 * bit4 is used to record IE (Interrupt Enable) bit
186 */
187 return (key & 0x10) == 0x10;
188}
189
190#endif /* _ASMLANGUAGE */
191
192#ifdef __cplusplus
193}
194#endif
195
196#endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_IRQ_H_ */
static ALWAYS_INLINE unsigned int arch_irq_lock(void)
Disable all interrupts on the local CPU.
Definition: irq.h:168
static ALWAYS_INLINE void arch_irq_unlock(unsigned int key)
Definition: irq.h:176
void arch_irq_disable(unsigned int irq)
int arch_irq_is_enabled(unsigned int irq)
static void arch_isr_direct_header(void)
Definition: irq.h:91
static void arch_isr_direct_footer(int maybe_swap)
Definition: irq.h:98
void arch_irq_enable(unsigned int irq)
static ALWAYS_INLINE bool arch_irq_unlocked(unsigned int key)
Definition: irq.h:181
ARCv2 auxiliary registers definitions.
Common toolchain abstraction.
#define ALWAYS_INLINE
Definition: common.h:116
void sys_trace_isr_enter(void)
Called when entering an ISR.
void sys_trace_isr_exit(void)
Called when exiting an ISR.
flags
Definition: http_parser.h:131
Public interface for configuring interrupts.
static k_spinlock_key_t key
Definition: spinlock_error_case.c:14
__UINT32_TYPE__ uint32_t
Definition: stdint.h:60
Software-managed ISR table.
Misc utilities.