Zephyr API Documentation  2.7.0-rc2
A Scalable Open Source RTOS
syscall.h
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1/*
2 * Copyright (c) 2018 Linaro Limited.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
16#ifndef ZEPHYR_INCLUDE_ARCH_ARC_SYSCALL_H_
17#define ZEPHYR_INCLUDE_ARCH_ARC_SYSCALL_H_
18
19#define _TRAP_S_SCALL_IRQ_OFFLOAD 1
20#define _TRAP_S_CALL_RUNTIME_EXCEPT 2
21#define _TRAP_S_CALL_SYSTEM_CALL 3
22
23#ifdef CONFIG_USERSPACE
24#ifndef _ASMLANGUAGE
25
26#include <zephyr/types.h>
27#include <stdbool.h>
28
29#ifdef CONFIG_ISA_ARCV2
31#endif
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36/* Syscall invocation macros. arc-specific machine constraints used to ensure
37 * args land in the proper registers. Currently, they are all stub functions
38 * just for enabling CONFIG_USERSPACE on arc w/o errors.
39 */
40
42 uintptr_t arg3, uintptr_t arg4,
43 uintptr_t arg5, uintptr_t arg6,
44 uintptr_t call_id)
45{
46 register uint32_t ret __asm__("r0") = arg1;
47 register uint32_t r1 __asm__("r1") = arg2;
48 register uint32_t r2 __asm__("r2") = arg3;
49 register uint32_t r3 __asm__("r3") = arg4;
50 register uint32_t r4 __asm__("r4") = arg5;
51 register uint32_t r5 __asm__("r5") = arg6;
52 register uint32_t r6 __asm__("r6") = call_id;
53
54 compiler_barrier();
55
56 __asm__ volatile(
57 "trap_s %[trap_s_id]\n"
58 : "=r"(ret)
59 : [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
60 "r" (ret), "r" (r1), "r" (r2), "r" (r3),
61 "r" (r4), "r" (r5), "r" (r6));
62
63 return ret;
64}
65
67 uintptr_t arg3, uintptr_t arg4,
68 uintptr_t arg5,
69 uintptr_t call_id)
70{
71 register uint32_t ret __asm__("r0") = arg1;
72 register uint32_t r1 __asm__("r1") = arg2;
73 register uint32_t r2 __asm__("r2") = arg3;
74 register uint32_t r3 __asm__("r3") = arg4;
75 register uint32_t r4 __asm__("r4") = arg5;
76 register uint32_t r6 __asm__("r6") = call_id;
77
78 compiler_barrier();
79
80 __asm__ volatile(
81 "trap_s %[trap_s_id]\n"
82 : "=r"(ret)
83 : [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
84 "r" (ret), "r" (r1), "r" (r2), "r" (r3),
85 "r" (r4), "r" (r6));
86
87 return ret;
88}
89
91 uintptr_t arg3, uintptr_t arg4,
92 uintptr_t call_id)
93{
94 register uint32_t ret __asm__("r0") = arg1;
95 register uint32_t r1 __asm__("r1") = arg2;
96 register uint32_t r2 __asm__("r2") = arg3;
97 register uint32_t r3 __asm__("r3") = arg4;
98 register uint32_t r6 __asm__("r6") = call_id;
99
100 compiler_barrier();
101
102 __asm__ volatile(
103 "trap_s %[trap_s_id]\n"
104 : "=r"(ret)
105 : [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
106 "r" (ret), "r" (r1), "r" (r2), "r" (r3),
107 "r" (r6));
108
109 return ret;
110}
111
113 uintptr_t arg3,
114 uintptr_t call_id)
115{
116 register uint32_t ret __asm__("r0") = arg1;
117 register uint32_t r1 __asm__("r1") = arg2;
118 register uint32_t r2 __asm__("r2") = arg3;
119 register uint32_t r6 __asm__("r6") = call_id;
120
121 compiler_barrier();
122
123 __asm__ volatile(
124 "trap_s %[trap_s_id]\n"
125 : "=r"(ret)
126 : [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
127 "r" (ret), "r" (r1), "r" (r2), "r" (r6));
128
129 return ret;
130}
131
133 uintptr_t call_id)
134{
135 register uint32_t ret __asm__("r0") = arg1;
136 register uint32_t r1 __asm__("r1") = arg2;
137 register uint32_t r6 __asm__("r6") = call_id;
138
139 compiler_barrier();
140
141 __asm__ volatile(
142 "trap_s %[trap_s_id]\n"
143 : "=r"(ret)
144 : [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
145 "r" (ret), "r" (r1), "r" (r6));
146
147 return ret;
148}
149
151{
152 register uint32_t ret __asm__("r0") = arg1;
153 register uint32_t r6 __asm__("r6") = call_id;
154
155 compiler_barrier();
156
157 __asm__ volatile(
158 "trap_s %[trap_s_id]\n"
159 : "=r"(ret)
160 : [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
161 "r" (ret), "r" (r6));
162
163 return ret;
164}
165
167{
168 register uint32_t ret __asm__("r0");
169 register uint32_t r6 __asm__("r6") = call_id;
170
171 compiler_barrier();
172
173 __asm__ volatile(
174 "trap_s %[trap_s_id]\n"
175 : "=r"(ret)
176 : [trap_s_id] "i" (_TRAP_S_CALL_SYSTEM_CALL),
177 "r" (ret), "r" (r6));
178
179 return ret;
180}
181
182static inline bool arch_is_user_context(void)
183{
184 uint32_t status;
185
186 compiler_barrier();
187
188 __asm__ volatile("lr %0, [%[status32]]\n"
189 : "=r"(status)
190 : [status32] "i" (_ARC_V2_STATUS32));
191
192 return !(status & _ARC_V2_STATUS32_US) ? true : false;
193}
194
195#ifdef __cplusplus
196}
197#endif
198
199#endif /* _ASMLANGUAGE */
200#endif /* CONFIG_USERSPACE */
201#endif /* ZEPHYR_INCLUDE_ARCH_ARC_SYSCALL_H_ */
static uintptr_t arch_syscall_invoke4(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t call_id)
Definition: syscall.h:90
static uintptr_t arch_syscall_invoke2(uintptr_t arg1, uintptr_t arg2, uintptr_t call_id)
Definition: syscall.h:132
static uintptr_t arch_syscall_invoke1(uintptr_t arg1, uintptr_t call_id)
Definition: syscall.h:150
static uintptr_t arch_syscall_invoke0(uintptr_t call_id)
Definition: syscall.h:166
static bool arch_is_user_context(void)
Definition: syscall.h:182
static uintptr_t arch_syscall_invoke5(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t call_id)
Definition: syscall.h:66
static uintptr_t arch_syscall_invoke3(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t call_id)
Definition: syscall.h:112
static uintptr_t arch_syscall_invoke6(uintptr_t arg1, uintptr_t arg2, uintptr_t arg3, uintptr_t arg4, uintptr_t arg5, uintptr_t arg6, uintptr_t call_id)
Definition: syscall.h:41
ARCv2 auxiliary registers definitions.
static ZTEST_BMEM volatile int ret
Definition: k_float_disable.c:28
__UINT32_TYPE__ uint32_t
Definition: stdint.h:60
__UINTPTR_TYPE__ uintptr_t
Definition: stdint.h:75